Die ontwikkeling van 'n 8-PSS trelliskode datasender en viterbi-ontvanger

Abstract

The reception of valid (error free) digital data after transmission is of the utmost importance in the modern society. As part of the project a trellis code data transmitter, as well as a Viterbi receiver was developed and evaluated. The project entails the use of intelligent DSP hardware and the development of associated software. The Viterbi algorithm was accepted as the design philosophy of the receiver because of its ability to identify erroneous data received and to correct it if possible. The realization of this technique necessitates the use of a processor with very high processing speed. For this reason the DSP56001 digital signal processor (DSP) was chosen as it is admirably suited for implementation in this system. The implementation of the system was preceded by computer simulations to determine the expected performance of the system. Any communication channel has a unique bandwidth. Problems however, occur when high-speed data communication is attempted over channels with limited bandwidth because of the relation between data rate and the required bandwidth. The narrower the bandwidth, the less data can be transmitted per unit time. During the execution of the project, trellis code modulated data was transmitted via a channel with limited bandwidth at different signal to noise ratios and the performance of the transmitter and receiver determined.